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Cypress CY7C68053 USB 2.0 MCU开发方案 免费猫

发布时间:2020-02-17 12:26:43 阅读: 来源:诱饵盒厂家

Cypress CY7C68053 USB 2.0 MCU开发方案

Cypress公司的MoBL-USB FX2LP18 (CY7C68053)是低功耗高度集成的USB 2.0 微控制器(MCU),集成了USB 2.0收发器,串行接口引擎(SIE),增强型8051微控制器和可编程外设接口,超低功耗.数据速率超过53MB/秒,达到USB 2.0带宽最大允许值,主要用在手机,智能手机,PDA,MP3播放器等.本文介绍了CY7C68053主要特性,方框图以及CY3687 MoBL-USB FX2LP18开发板主要特性,电路图,材料清单和PCB布局图.

Cypress Semiconductor Corporation’s MoBL-USB FX2LP18 (CY7C68053) is a low voltage (1.8 V) version of the EZ-USB reg; FX2LP (CY7C68013A), which is a highly integrated, low power USB 2.0 microcontroller. By integrating the USB 2.0 transceiver, serial interface engine (SIE), enhanced 8051 microcontroller, and a programmable peripheral interface in a single chip, Cypress has created a very cost effective solution that provides superior time-to-market advantages with low power to enable bus powered applications.

The ingenious architecture of MoBL-USB FX2LP18 results in data transfer rates of over 53 Mbytes per second, the maximum allowable USB 2.0 bandwidth, while still using a low cost 8051 microcontroller in a package as small as a 56VFBGA (5 mm x 5 mm). Because it incorporates the USB 2.0 transceiver, the MoBL-USB FX2LP18 is more economical, providing a smaller footprint solution than USB 2.0 SIE or external transceiver implementations. With MoBL-USB FX2LP18, the Cypress Smart SIE handles most of the USB 1.1 and 2.0 protocol in hardware, freeing the embedded microcontroller for application-specific functions and decreasing development time to ensure USB compatibility.

The General Programmable Interface (GPIF) and Master/Slave Endpoint FIFO (8 or 16-bit data bus) provide an easy and glueless interface to popular interfaces such as ATA, UTOPIA, EPP, PCMCIA, and most DSP/processors.

CY7C68053主要特性:

■ USB 2.0 9 V USB-IF high speed and full speed compliant (TID#40000188)

■ Single-chip integrated USB 2.0 transceiver, smart SIE, and enhanced 8051 microprocessor

■ Ideal for mobile applications (cell phone, smart phones, PDAs, MP3 players)

Ultra low power

Suspend current: 20 μA (typical)

■ Software: 8051 Code runs from:

Internal RAM, which is loaded from EEPROM

■ 16 kBytes of on-chip code/data RAM

■ Four programmable BULK/INTERRUPT/ISOCHRONOUS endpoints

Buffering options: double, triple, and quad

■ Additional Programmable (BULK/INTERRUPT) 64-Byte Endpoint

■ 8 or 16-Bit External Data Interface

■ Smart Media Standard ECC Generation

■ GPIF (General Programmable Interface)

Allows direct connection to most parallel interface

Programmable waveform descriptors and configuration registers to define waveforms

Supports multiple Ready and Control outputs

■ Integrated, Industry Standard Enhanced 8051

48 MHz, 24 MHz, or 12 MHz CPU operation

Four clocks per instruction cycle

Three counter/timers

Expanded interrupt system

Two data pointers

■ 1.8 V Core Operation

■ 1.8 V to 3.3 V I/O Operation

■ Vectored USB Interrupts and GPIF/FIFO Interrupts

■ Separate Data Buffers for Setup and Data Portions of a CONTROL Transfer

■ Integrated I2C Controller, runs at 100 or 400 kHz

■ Four Integrated FIFOs

Integrated glue logic and FIFOs lower system cost

Automatic conversion to and from 16-bit buses

Master or slave operation

Uses external clock or asynchronous strobes

Easy interface to ASIC and DSP ICs

■ Available in Industrial Temperature Grade

■ Available in one Pb-free Package with up to 24 GPIOs

56-pin VFBGA (24 GPIOs)

CY7C68053应用:

There are a wide variety of applications for the MoBL-USB FX2LP18. It is used in cell phones, smart phones, PDAs, andMP3 players, to name a few.

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